1. Field of the Invention
The invention is related to a method for making bipolar transistors and, in particular, for making a self-aligned lateral bipolar transistor using silicon on insulator (SOI) technology.
2. Background of the Invention
Bipolar transistors in a lateral configuration are ideally suited for thin silicon on insulator (SOI) technology. These bipolar transistors have the potential for sharing fabrication steps with MOSFETS and related devices. The most advanced process for making such bipolar transistors has been proposed by J.C. Sturm et al in their article "A Lateral Silicon-on-Insulator Bipolar Transistor with a Self-Aligned Base Contact", IEEE Electron Device
Letters, Vol. EDL-8, No. 3, Mar. 1987, pp. 104-106. The process disclosed by Sturm et al features a self-aligned contact to the base. Sturm's approach to the fabrication of the lateral bipolar transistor can also be used in bulk processing technology combined with any one of the standard isolation techniques. The process for making a lateral bipolar transistor taught by Sturm et al has the following steps:
1) Island formation (first mask step) PA0 2) Base contact implant PA0 3) Base mesa formation by partial removal of silicon (second mask step) PA0 4) Emitter, collector implant which uses mask for base mesa formation PA0 5) Oxide deposition and planarization PA0 6) Partial removal of deposited oxide for base contact vias (third masking step) PA0 7) Emitter, collector vias etch (fourth mask step) PA0 8) Metal electrode deposition and etch (fifth mask step)
The process taught by Sturm et al requires a base mesa to be formed (step 3) in which the silicon island, outside the base region, is etched approximately halfway through by a vertical plasma etch. Alternate methods for making self-aligned lateral bipolar transistors in semi-conductor substrates are taught by Ogura et al in U.S. Pat. No. 4,641,170, D'Arrigo et al; in U.S. Pat. No. 4,669,177, Coello-Vera; in U.S. Pat. No. 4,586,965, Welbourn; in U.S. Pat. No. 4,801,556; and by Hingark in U.S. Pat. No. 4,298,402.
The invention is an improved method for making lateral bipolar transistor on an insulator substrate.